Search for dissertations about: "Task Graphs"

Showing result 1 - 5 of 37 swedish dissertations containing the words Task Graphs.

  2. 1. Mapping Concurrent Applications to Multiprocessor Systems with Multithreaded Processors and Network on Chip-Based Interconnections

    Author : Ruxandra Pop; Petru Eles; Shashi Kumar; Linköpings universitet; []
    Keywords : Network on Chip; Multiprocessor Embedded Systems; Task Mapping; Task Scheduling; Multithreading; Simultaneous Multithreading; Response Time Estimation; Genetic Algorithms; List Scheduling; Soft Deadline; Task Graphs; TECHNOLOGY; TEKNIKVETENSKAP;

    Abstract : Network on Chip (NoC) architectures provide scalable platforms for designing Systems on Chip (SoC) with large number of cores. Developing products and applications using an NoC architecture offers many challenges and opportunities. A tool which can map an application or a set of applications to a given NoC architecture will be essential. READ MORE

  4. 2. Energy Efficient Task Mapping and Resource Management on Multi-core Architectures

    Author : Jing Chen; Chalmers tekniska högskola; []
    Keywords : NATURVETENSKAP; NATURAL SCIENCES; TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY; TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY; Energy Consumption; Resource Management; Runtime; Dynamic Voltage-Frequency Scaling DVFS ; Predictive Models; Task Scheduling;

    Abstract : Reducing energy consumption of parallel applications executing on chip multi- processors (CMPs) is important for green computing. Hardware vendors have been developing a variety of system features to support energy efficient computing, for example, integrating asymmetric core types on a single chip referred to as static asymmetry and supporting dynamic voltage and frequency scaling (DVFS) referred to as dynamic asymmetry. READ MORE

  5. 3. Improving Performance and Quality-of-Service through the Task-Parallel Model​ : Optimizations and Future Directions for OpenMP

    Author : Artur Podobas; Mats Brorsson; Georgi Gaydadjiev; KTH; []
    Keywords : TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY; Task Parallel; OpenMP; Scheduling; OmpSs; multicore; manycore; Datalogi; Computer Science;

    Abstract : With the failure of Dennard's scaling, which stated that shrinking transistors will be more power-efficient, computer hardware has today become very divergent. Initially the change only concerned the number of processor on a chip (multicores), but has today further escalated into complex heterogeneous system with non-intuitive properties -- properties that can improve performance and power consumption but also strain the programmer expected to develop on them. READ MORE

  6. 4. Models and Complexity Results in Real-Time Scheduling Theory

    Author : Pontus Ekberg; Wang Yi; Alberto Marchetti-Spaccamela; Uppsala universitet; []
    Keywords : NATURVETENSKAP; NATURAL SCIENCES; Real-time systems; Scheduling theory; Task models; Computational complexity; Datavetenskap med inriktning mot inbyggda system; Computer Science with specialization in Embedded Systems;

    Abstract : When designing real-time systems, we want to prove that they will satisfy given timing constraints at run time. The main objective of real-time scheduling theory is to analyze properties of mathematical models that capture the temporal behaviors of such systems. READ MORE

  7. 5. Electrothermal Simulation in a Concurrent Waveform Relaxation Based Circuit Simulator

    Author : Magnus Wiklund; Institutionen för elektro- och informationsteknik; []
    Keywords : TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY; Circuit synthesis; Bond graphs; Nullor; Circuit theory; Analog simulation; Circuit simulation; Multiprocessor computer; CONCISE; Parallel computation; Waveform relaxation; Thermal models; Transistor models; Electro-thermal simulation; Electro-thermal modeling; Translinear circuits; Electronics; Elektronik; Electrical engineering; Elektroteknik;

    Abstract : The main purpose of this work is to study methods to simulate electro-thermal effects in integrated circuits using CONCISE a waveform relaxation based circuit simulator. WR is a method that is suitable to run on a multi-computer with state of the art computing power. Especially CMOS VLSI circuits have been simulated successfully with WR. READ MORE