Search for dissertations about: "Through-Silicon-Via TSV"

Showing result 1 - 5 of 8 swedish dissertations containing the words Through-Silicon-Via TSV.

  1. 1. Integration and Fabrication Techniques for 3D Micro- and Nanodevices

    Author : Andreas C. Fischer; Frank Niklaus; Karl F. Böhringer; KTH; []
    Keywords : Microelectromechanical systems; MEMS; Nanoelectromechanical systems; NEMS; silicon; wafer-level; chip-level; through silicon via; TSV; packaging; 3D packaging; vacuum packaging; liquid encapsulation; integration; heterogeneous integration; wafer bonding; microactuators; shape memory alloy; SMA; wire bonding; magnetic assembly; self-assembly; 3D; 3D printing; focused ion beam; FIB;

    Abstract : The development of micro and nano-electromechanical systems (MEMS and NEMS) with entirely new or improved functionalities is typically based on novel or improved designs, materials and fabrication methods. However, today’s micro- and nano-fabrication is restrained by manufacturing paradigms that have been established by the integrated circuit (IC) industry over the past few decades. READ MORE

  2. 2. Towards 3D Integration of Carbon Based Electronics

    Author : Wei Mu; Chalmers tekniska högskola; []
    Keywords : TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY; TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY; transfer; carbon nanomaterials; polymer filling; MWCNTs; interconnect; 3D integration; packaging; graphene; horizontally aligned SWCNTs; through silicon via;

    Abstract : Carbon-based nanomaterials such as carbon nanotubes (CNTs) and graphene, which possess superior electrical, thermal and mechanical properties, have been proposed as alternative materials for future electronics. The proposed applications span from the device level, replacing silicon-based transistors, with single-walled carbon nanotubes (SWCNTs) or graphene, to packaging level using multi-walled carbon nanotubes (MWCNTs) for interconnects. READ MORE

  3. 3. Characterization of Nanomaterials for Interconnect and Thermal Management in Electronic Packaging

    Author : Si Chen; Chalmers tekniska högskola; []
    Keywords : TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY; heat dissipation; electronic packaging; nanomaterial; characterization; thermal interface material; solder; thermoelectric.; interconnect; through silicon via;

    Abstract : Electronic packaging, protecting the fragile chip from atmosphere and providing the paths for signal transmission as well as heat dissipation, is one of the most important parts in electronic devices. The cost, dimensions, performance, and reliability of an electronic device therefore strongly depend on its packaging structures and materials. READ MORE

  4. 4. System Interconnection Design Trade-offs in Three-Dimensional (3-D) Integrated Circuits

    Author : Roshan Weerasekera; Hannu Tenhunen; Li-Rong Zheng; Atila Alvandpour; KTH; []
    Keywords : NATURVETENSKAP; NATURAL SCIENCES; Interconnects; Parasitic Extraction; Repeaters; Signal Integrity; System-on-Chip SoP ; System-in-Package SiP ; System-on-Package SoP ; Three-dimensional 3-D Integration; Through-Silicon-Via TSV ; Vertical Integration; Information technology; Informationsteknik;

    Abstract : Continued technology scaling together with the integration of disparate technologies in a single chip means that device performance continues to outstrip interconnect and packaging capabilities, and hence there exist many difficult engineering challenges, most notably in power management, noise isolation, and intra and inter-chip communication. Significant research effort spanning many decades has been expended on traditional VLSI integration technologies, encompassing process, circuit and architectural issues to tackle these problems. READ MORE

  5. 5. Towards Unconventional Applications of Wire Bonding

    Author : Stephan Schröder; Frank Niklaus; Michael Mayer; KTH; []
    Keywords : TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY; Micro-electromechanical systems MEMS ; heterogeneous 3D integration; wire bonding; wire integration; transfer wafer bonding; nondispersive infrared gas sensing; low-stress packaging; shape memory alloy SMA ; infrared IR emitter; through silicon via TSV ; ethanol sensing; nitric oxide gas sensing; wafer-level; chip-level; Kanthal; nickel chromium NiCr ; Electrical Engineering; Elektro- och systemteknik;

    Abstract : This thesis presents novel heterogeneous integration approaches of wire materials to fabricated and package MEMS devices by exploring unconventional applications of wire bonding technology. Wire bonding, traditionally endemic in the realm of device packaging to establish electrical die-to-package interconnections, is an attractive back-end technology, offering promising features, such as high throughput, flexibility and placement accuracy. READ MORE