High-efficiency Power Amplification Techniques for Wireless Transmitters

Abstract: The low efficiency of existing power amplifiers (PAs) is causing excessive energy consumption in wireless systems. Improving the PA efficiency is therefore of great environmental and economical importance. This thesis address a wide range of advanced PA design methods and novel PA architectures that all contribute to significantly improve the efficiency of PAs for wireless applications. The first part of the thesis addresses the design of PAs with high peak efficiency. A transistor modeling technique for first-pass design of switched-mode and harmonically tuned PAs is proposed. Using the proposed modeling technique, optimization of harmonic impedances, and employing bare-die transistors, a state-of-the-art power-added efficiency (PAE) of 80% is achieved for 1-GHz LDMOS and 3.5-GHz GaN-HEMT PAs at 10 W and 7 W output powers, respectively. Another PA with a current mode class-D topology is also designed at 1 GHz using a packaged LDMOS transistor and its commercially available model. A PAE of 69% and gain of 15 dB is achieved at an output power of 20 W. In addition, by investigating the effect of harmonic impedances for a designed 35-GHz GaAs mHEMT PA, it is shown that the application of harmonic tuning techniques is not only limited to low GHz frequencies. Then, in order to improve the efficiency of PAs for signals with large envelope variations, dynamic supply modulation (DSM) and dynamic load modulation (DLM) techniques are evaluated at transistor and PA levels using static measurements. The results show that the two techniques provide similar efficiencies down to a certain output power level. At further power back-off, their efficiencies start to differ due to their different technology-related intrinsic loss mechanisms. Finally, the feasibility of varactor-based DLM PA architectures for high-power (>1 W), high-frequency (>0.9 GHz) applications is shown for the first time. The technique is demonstrated by a modular approach whereby a varactor-based tunable matching network (VMN) is designed for and connected to an existing PA. An average power-added efficiency (PAEavg) of 53% at 6 W peak output power is achieved at 1 GHz using a 3.84-MHz WCDMA signal with 7 dB peak-to-average ratio. Then, in order to achieve a more wideband performance, an integrated approach is proposed in which the PA and VMN are co-designed. A PAEavg of 44% at 5 W peak power is achieved at 2.65 GHz for the same WCDMA signal but with 38.4 MHz bandwidth. This is the largest high-efficiency bandwidth reported for all efficiency enhancement techniques. Two digital predistortion techniques have also been proposed, by which normalized mean square errors of <-35 dB and adjacent channel leakage ratios of <-43 dBc were achieved in all the experiments.