Three-Dimensional Metal-Semiconductor Heterostructures for Device Applications

Abstract: Fabrication and characterisation of buried metal contacts in compound semiconductors are demonstrated. The contacts have been investigated due to their usage both as gates in transistors and as active or passive elements in novel devices. A detailed description of the processing conditions for fabrication of nm-sized W-structures in a lift-off process is given. These structures have been embedded in GaAs or InP by epitaxial overgrowth using metalorganic vapour phase epitaxy. The conditions for epitaxial overgrowth are discussed and a special emphasis is given the correlation between processing and electrical characteristics of the buried contacts. Matrices of W discs have been buried in GaAs and a controlled formation of semi-insulating material is demonstrated in structures with varying disc separation. The kinetics of the buried contacts have been investigated by photo-conductivity measurements, photo-capacitance transients and deep-level transient spectroscopy (DLTS). The capture and emission have been studied on a signal level of one electron per disc. Thereby, the Coulomb effect on the contacts are revealed. The semi-insulating properties is used for fabrication of vertical channels in vacant postitions in a buried disc lattice. GaInP/GaAs double barriers are combined with the buried metal discs and sub-micrometer resonant tunnelling diodes are created. Three-terminal devices are further discussed. The characteristics of a Heterojunction Permeable Base Transistor has been simulated and the ballistic transport is shown to substantially enhance the device performance. Interference of electron waves is numerically demonstrated to create an interference pattern in the Solid State Biprism Device. Finally, lateral confinement effects are observed in a resonant tunnelling transistor. All these devices rely on the fabrication of three-dimensional metal-semiconductor heterostructures.