Microwave CMOS Beamforming Transmitters

Abstract: The increase of the consumer electronics market the last couple of decades has been
one of the main drivers of IC process technology development. The majority of the
ICs are used in digital applications, and for these CMOS is the choice of technology.
The urge to squeeze more transistors on to a given area has led to shrinking feature
sizes. It has resulted in higher transition frequencies and reduced supply voltage.
During the last decade the increasing transition frequency has enabled CMOS to be
used in RF applications, as well. Unfortunately, the decreasing supply voltage that,
until recently, has accompanied the reduced feature sizes makes it more difficult to
build power amplifiers that can deliver the amount of power needed to transmit the
radio signal over the desired distance. In the receiver, the reduced supply voltage has
resulted in reduced signal swing, which compromises linearity and dynamic range.
In this thesis new topologies for the power amplifier is investigated, and the approach
to combine the power from multiple power amplifiers is taken. In this way,
despite the low supply voltage, the transmitted power by the IC can still be high. The
increased transition frequency of CMOS technology can be used to increase the operating
frequency to tens of GHz. The possibility for small sized phased antenna arrays
then reveals, giving high directivity of the antenna and the potential for electrical beam
steering. This both reduces interference to nearby receivers through spatial selectivity,
and increases the equivalent isotropic radiated power. Power amplifiers with digital
360◦ phase control and antenna arrays have been investigated.
In recent years applications at high operating frequencies have attained much focus
from both academia and industry, such as automotive radar at 77 GHz andWLAN
at 60 GHz. Even though the shrinking feature sizes of CMOS transistors have resulted
in transit frequencies above 150 GHz, the high frequency required by many applications
is still a great challenge for the CMOS designer. Therefore, in Paper IV and
Paper VI different approaches to keep the on chip frequency lower than the RF carrier
frequency as long as possible have been taken. In Paper IV two different frequency
doubling 60 GHz power amplifier topologies are presented, and in Paper VI a subharmonic
mixer with 30 GHz radio frequency and 15 GHz differential local oscillator is
presented.
Many transceiver architectures rely on quadrature signals driving the down- or upconversion
mixers. The power amplifiers in Paper I and II need quadrature signals
to implement the digital phase control. Therefore, in Paper V a three-stage active
polyphase filter with quadrature output signals, high operation frequency, and wide
bandwidth is analyzed. Analytical equations for both voltage gain and phase transfer
function of a loaded stage are derived. The filter shows robustness against process
parameter spread and achieves high quadrature signal quality from 6 GHz to 14 GHz.