Search for dissertations about: "Chip Multi Many-core Processors"

Found 4 swedish dissertations containing the words Chip Multi Many-core Processors.

  1. 1. High-Performance Network-on-Chip Design for Many-Core Processors

    Author : Boqian Wang; Zhonghai Lu; Kun-Chih Chen; KTH; []
    Keywords : NATURVETENSKAP; NATURAL SCIENCES; TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY; Network-on-Chip; Chip Multi Many-core Processors; Multiprocessor System-on-Chip; High-Performance Computing; Cache Coherence; Virtual Channel Reservation; Admission Control; Artificial Neural Network; AXI4; Quality of Service; Network-on-Chip; Chip Multi Many-core Processors; Multiprocessor Sys-tem on a Chip; High-Performance Computing; Cache Coherence; Virtual Channel Reser-vation; Admission Control; Artificial Neural Network; AXI4; Quality of Servic; Informations- och kommunikationsteknik; Information and Communication Technology;

    Abstract : With the development of on-chip manufacturing technologies and the requirements of high-performance computing, the core count is growing quickly in Chip Multi/Many-core Processors (CMPs) and Multiprocessor System-on-Chip (MPSoC) to support larger scale parallel execution. Network-on-Chip (NoC) has become the de facto solution for CMPs and MPSoCs in addressing the communication challenge. READ MORE

  2. 2. Efficient Memory Access and Synchronization in NoC-based Many-core Processors

    Author : Xiaowen Chen; Zhonghai Lu; Umit Ogras; KTH; []
    Keywords : TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY; TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY; Many-core; Network-on-Chip; Distributed Shared Memory; Microcode; Virtual-to-physical Address Translation; Memory Access Fairness; Barrier Synchronization; Cooperative Communication; Informations- och kommunikationsteknik; Information and Communication Technology;

    Abstract : In NoC-based many-core processors, memory subsystem and synchronization mechanism are always the two important design aspects, since mining parallelism and pursuing higher performance require not only optimized memory management but also efficient synchronization mechanism. Therefore, we are motivated to research on efficient memory access and synchronization in three topics, namely, efficient on-chip memory organization, fair shared memory access, and efficient many-core synchronization. READ MORE

  3. 3. Power and Performance Optimization for Network-on-Chip based Many-Core Processors

    Author : Yuan Yao; Zhonghai Lu; Trevor E. Carlson; KTH; []
    Keywords : TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY; Many-Core Processor; Network-on-Chip; Performance; Power Management; DVFS; Shared Memory Synchronization; Hardware Software Co-Design; Cache Coherency; Performance Isolation; Informations- och kommunikationsteknik; Information and Communication Technology;

    Abstract : Network-on-Chip (NoC) is emerging as a critical shared architecture for CMPs (Chip Multi-/Many-Core Processors) running parallel and concurrent applications. As the core count scales up and the transistor size shrinks, how to optimize power and performance for NoC open new research challenges. READ MORE

  4. 4. Real-Time Communication over Wormhole-Switched On-Chip Networks

    Author : Meng Liu; Thomas Nolte; Moris Behnam; Christian Fraboul; Mälardalens högskola; []
    Keywords : TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY; real-time system; network-on-chips; Computer Science; datavetenskap;

    Abstract : In a modern industrial system, the requirement on computational capacity has increased dramatically, in order to support a higher number of functionalities, to process a larger amount of data or to make faster and safer run-time decisions. Instead of using a traditional single-core processor where threads can only be executed sequentially, multi-core and many-core processors are gaining more and more attentions nowadays. READ MORE