Search for dissertations about: "Digital ASIC Design"

Showing result 1 - 5 of 19 swedish dissertations containing the words Digital ASIC Design.

  2. 1. Baseband Processing for 5G and Beyond: Algorithms, VLSI Architectures, and Co-design

    Author : Mojtaba Mahdavi; Institutionen för elektro- och informationsteknik; []
    Keywords : TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY; TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY; TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY; TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY; VLSI Implementation; Hardware architectures; ASIC implementation; FPGA implementation; CMOS Technology; Baseband Processing; Massive MIMO; 5G New Radio; Beyond 5G; Co-Design; FFT processor; OFDM modulation; wireless communications; Massive MIMO Detection; Angular domain processing; Zero forcing; Systolic array; Non-linear detector; Channel Sparsity; Channel compression; Linear detector; Channel coding; Spatial coupling; Turbo-like codes; Spatially coupled serially concatenated codes; Threshold analysis; Decoder architecture; BCJR algorithm; MAP algorithm; Coupling memory; Window decoding; Complexity analysis; Performance Evaluation; Throughput; Decoding Latency; Silicon area; Design tradeoffs; Interleaver architecture; Memory requirements; Matrix multiplication; Channel state information CSI ; Cholesky decomposition; Tanner graph; Trellis codes; Convolutional encoder; Code design; Puncturing; Reordering circuit; wireless communication system; digital electronic;

    Abstract : In recent years the number of connected devices and the demand for high data-rates have been significantly increased. This enormous growth is more pronounced by the introduction of the Internet of things (IoT) in which several devices are interconnected to exchange data for various applications like smart homes and smart cities. READ MORE

  4. 2. Design of Reconfigurable Hardware Architectures for Real-time Applications

    Author : Thomas Lenart; Institutionen för elektro- och informationsteknik; []
    Keywords : TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY; Stream Processing; Digital Holography; Reconfigurable Computing; Reconfigurable Architectures; Run-time Reconfiguration; Design Exploration; Hybrid floating-point; Data Scaling; FFT; ASIC;

    Abstract : This thesis discusses modeling and implementation of reconfigurable hardware architectures for real-time applications. The target application in this work is digital holographic imaging, where visible images are to be reconstructed based on holographic recordings. READ MORE

  5. 3. ASIC Implementation of a Delayless Acoustic Echo Canceller: Architecture and Arithmetic

    Author : Anders Berkeman; Institutionen för elektro- och informationsteknik; []
    Keywords : TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY; Signal processing; Signalbehandling; Digital Arithmetic; Acoustic Echo Cancellation; Hardware Implementation; Digital ASIC Design; Digital Signal Processing;

    Abstract : Application specific digital signal processors are superior compared to standard digital signal processors in a number of application fields, mainly due to high throughput and low power consumption traded for flexibility. This thesis deals with two areas related to hardware implementation of custom digital signal processors: design methodology and efficient implementation of arithmetic circuits. READ MORE

  6. 4. Hardware Architectures for Wireless Communication - Symbol Detection and Channel Estimation

    Author : Johan Löfgren; Institutionen för elektro- och informationsteknik; []
    Keywords : TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY; VLSI; Digital Design; ASIC; Architecture; Symbol Detection; Channel Estimation; MIMO; OFDM;

    Abstract : In this thesis different aspects of baseband implementation of mobile communication systems is treated. The content is focused on symbol detection and channel estimation in MIMO and OFDM. The thesis deals with the complete chain from algorithm to silicon implementation within these areas. READ MORE

  7. 5. Resuable macro based synthesis for digital ASIC design

    Author : Chuansu Chen; KTH; []
    Keywords : ;

    Abstract : .... READ MORE