Search for dissertations about: "III-V on Si integration"

Showing result 1 - 5 of 20 swedish dissertations containing the words III-V on Si integration.

2. 1. III-V Devices for Emerging Electronic Applications

   Author : Patrik Olausson; NanoLund: Centre for Nanoscience; []
   Keywords : TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY; TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY; Cryogenic; Hall; III-V; InAs; InGaAs; Josephson junction; Magnetoresistance; MOSFET; Nanowire; Quantum well; Superconductivity; Template-assisted selective epitaxy; Cryogenic; Hall; III-V; InAs; InGaAs; Josephson junction; Magnetoresistance; MOSFET; Nanowire; Quantum well; Superconductivity; Template-assisted selective epitaxy;

   Abstract : Today’s digitalized society relies on the advancement of silicon (Si) Complementary Metal Oxide Semiconductor (CMOS) technology, but the limitations of down-scaling and the rapidly increasing demand for added functionality that is not easily achieved in Si, have pushed efforts to monolithically 3D-integrate III-V devices above the Si-CMOS technology. In addition, the demand for increased computational power and handling of vast amounts of data is rapidly increasing. READ MORE

4. 2. Vertical Heterostructure III-V MOSFETs for CMOS, RF and Memory Applications

   Author : Adam Jönsson; Nanoelektronik; []
   Keywords : TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY; Nanowire; MOSFET; CMOS; RRAM; III-V; InAs; GaSb; InGaAs; Heterostructure; vertical; nanowire NW ; MOSFET; III-V materials; RRAM; RF; CMOS; InAs; GaSb; InGaAs; heterostructure; Vertical nanowire;

   Abstract : This thesis focuses mainly on the co-integration of vertical nanowiren-type InAs and p-type GaSb MOSFETs on Si (Paper I & II), whereMOVPE grown vertical InAs-GaSb heterostructure nanowires areused for realizing monolithically integrated and co-processed all-III-V CMOS.Utilizing a bottom-up approach based on MOVPE grown nanowires enablesdesign flexibilities, such as in-situ doping and heterostructure formation,which serves to reduce the amount of mask steps during fabrication. READ MORE

5. 3. Electrical Characterisation of III-V Nanowire MOSFETs

   Author : Markus Hellenbrand; Institutionen för elektro- och informationsteknik; []
   Keywords : TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY; TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY; MOSFET; TFET; III-V; Nanowire; Hysteresis; Low-Frequency Noise; Random Telegraph Noise; cryogenic; Reliability; Radio Frequency; Small-Signal Model;

   Abstract : The ever increasing demand for faster and more energy-efficient electricalcomputation and communication presents severe challenges for the semiconductor industry and particularly for the metal-oxidesemiconductorfield-effect transistor (MOSFET), which is the workhorse of modern electronics. III-V materials exhibit higher carrier mobilities than the most commonly used MOSFET material Si so that the realisation of III-V MOSFETs can enable higher operation speeds and lower drive voltages than that which is possible in Si electronics. READ MORE

6. 4. Electrical Characterization of III-V Nanostructure

   Author : Aein Shiri Babadi; Institutionen för elektro- och informationsteknik; []
   Keywords : High-κ; Metal-Oxide-Semicondcutor capacitors; MOSCAPs; III-V semiconductors; InAs; GaSb; interface traps; border traps; C-V; Simulations; Nanowire; MOSFET; Fabrication;

   Abstract : This thesis investigates the electronic properties of a number of novel III-V materials and material combinations for transistor applications. In particular, high-κ/InAs metal-oxide-semiconductor (MOS) structures and transport properties of GaSb nanowires have been studied. READ MORE

7. 5. Epitaxial III-V/Si heterojunctions for photonic devices

   Author : Giriprasanth Omanakuttan; Sebastian Lourdudoss; Yanting Sun; Harri Lipsanen; KTH; []
   Keywords : TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY; epitaxy; heterojunction; III-V on Si integration; solar cell; Fysik; Physics;

   Abstract : Monolithic integration of III-V materials on silicon is of great interest for efficient electronic-photonic integrated devices and multijunction solar cells on silicon. However, defect formation in the heteroepitaxial layers due to lattice mismatch, thermal mismatch, and polarity mismatch makes it a great challenge. READ MORE