Search for dissertations about: "Instruction-level parallelism"

Showing result 1 - 5 of 7 swedish dissertations containing the words Instruction-level parallelism.

2. 1. Integrated Optimal Code Generation for Digital Signal Processors

   Author : Andrzej Bednarski; Christoph Kessler; Alain Darte; Linköpings universitet; []
   Keywords : NATURVETENSKAP; NATURAL SCIENCES; Instruction-level parallelism; integrated code generation; dynamic programming; instruction scheduling; instruction selection; clustered VLIW architecture; integer linear programming; architecture description language; Computer science; Datavetenskap;

   Abstract : In this thesis we address the problem of optimal code generation for irregular architectures such as Digital Signal Processors (DSPs).Code generation consists mainly of three interrelated optimization tasks: instruction selection (with resource allocation), instruction scheduling and register allocation. READ MORE

4. 2. Exploiting Fine-grain Parallelism in Concurrent Constraint Languages

   Author : Johan Montelius; RISE; []
   Keywords : NATURVETENSKAP; NATURAL SCIENCES; Implicit parallelism; Concurrent Constraint Programming; Cache performance; Logic programming; Abstract machine; Parallel execution; Scheduling; Multiprocessor; Shared memory;

   Abstract : This dissertation presents the design, implementation, and evaluation of a system that exploits fine-grain implicit parallelism in concurrent constraint programming language. The system is able to outperform a C implementation of an algorithm with complex dependencies without any user annotations. READ MORE

5. 3. Analysis and Optimization of Communication Overheads in Multi-core Architectures

   Author : Madhavan Manivannan; Chalmers tekniska högskola; []
   Keywords : NATURVETENSKAP; NATURAL SCIENCES; task parallelism; multi-core; cache coherence; runtime systems; sharing patterns; Amdahl’s Law;

   Abstract : The transition to multi-core architectures can be attributed mainly to fundamental limitations in clockfrequency scaling coupled with a slow growth in uniprocessor performance effected by the challengesin exploiting instruction-level parallelism. Consequently, programmers can no longer realize significant performance gains without investing effort into parallelizing applications. READ MORE

6. 4. Techniques to Reduce Thread-Level Speculation Overhead

   Author : Fredrik Warg; Chalmers tekniska högskola; []
   Keywords : NATURVETENSKAP; NATURAL SCIENCES; Computer architecture; multithreaded processors; performance evaluation; speculation overhead; thread-level speculation; chip multiprocessors;

   Abstract : The traditional single-core processors are being replaced by chip multiprocessors (CMPs) where several processor cores are integrated on a single chip. While this is beneficial for multithreaded applications and multiprogrammed workloads, CMPs do not provide performance improvements for single-threaded applications. READ MORE

7. 5. Static Execution Time Analysis of Parallel Systems

   Author : Andreas Gustavsson; Björn Lisper; Jan Gustafsson; Andreas Ermedahl; David Broman; Mälardalens högskola; []
   Keywords : NATURVETENSKAP; NATURAL SCIENCES; WCET analysis; parallel systems; multi-core; multicore; threaded programming language; Computer Science; datavetenskap;

   Abstract : The past trend of increasing processor throughput by increasing the clock frequency and the instruction level parallelism is no longer feasible due to extensive power consumption and heat dissipation. Therefore, the current trend in computer hardware design is to expose explicit parallelism to the software level. READ MORE