Search for dissertations about: "NOC 3D"

Found 5 swedish dissertations containing the words NOC 3D.

2. 1. Exploring the Scalability and Performance of Networks-on-Chip with Deflection Routing in 3D Many-core Architecture

   Author : Awet Yemane Weldezion; Hannu Tenhunen; Lirong Zheng; Tapani Ahonen; KTH; []
   Keywords : TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY; Alpha-model; Average distance; B-Model; NoC; Zero-load predictive model; deflection routing; q-routing;

   Abstract : Three-Dimensional (3D) integration of circuits based on die and wafer stacking using through-silicon-via is a critical technology in enabling "more-than-Moore", i.e. functional integration of devices beyond pure scaling ("more Moore"). READ MORE

4. 2. Efficient Memory Access and Synchronization in NoC-based Many-core Processors

   Author : Xiaowen Chen; Zhonghai Lu; Umit Ogras; KTH; []
   Keywords : TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY; TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY; Many-core; Network-on-Chip; Distributed Shared Memory; Microcode; Virtual-to-physical Address Translation; Memory Access Fairness; Barrier Synchronization; Cooperative Communication; Informations- och kommunikationsteknik; Information and Communication Technology;

   Abstract : In NoC-based many-core processors, memory subsystem and synchronization mechanism are always the two important design aspects, since mining parallelism and pursuing higher performance require not only optimized memory management but also efficient synchronization mechanism. Therefore, we are motivated to research on efficient memory access and synchronization in three topics, namely, efficient on-chip memory organization, fair shared memory access, and efficient many-core synchronization. READ MORE

5. 3. Performance and Energy Efficient Network-on-Chip Architectures

   Author : Sriram Vangal; Atila Alvandpour; Wim Dehaene; Linköpings universitet; []
   Keywords : TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY; Chips; MOS transistors; Network-on-Chip NoC ; process technology; FPMAC; Electrical engineering; Elektroteknik;

   Abstract : The scaling of MOS transistors into the nanometer regime opens the possibility for creating large Network-on-Chip (NoC) architectures containing hundreds of integrated processing elements with on-chip communication. NoC architectures, with structured on-chip networks are emerging as a scalable and modular solution to global communications within large systems-on-chip. READ MORE

6. 4. Performance and Energy Efficient Building Blocks for Network-on-Chip Architectures

   Author : Sriram R. Vangal; Atila Alvandpour; Viktor Öwall; Linköpings universitet; []
   Keywords : NATURVETENSKAP; NATURAL SCIENCES; Network-on-Chip Architectures; floating-point units; tiled-architectures; crossbar routers; multi-processor interconnection; Computer engineering; Datorteknik;

   Abstract : The ever shrinking size of the MOS transistors brings the promise of scalable Network-on-Chip (NoC) architectures containing hundreds of processing elements with on-chip communication, all integrated into a single die. Such a computational fabric will provide high levels of performance in an energy efficient manner. READ MORE

7. 5. Advances on Adaptive Fault-Tolerant System Components: Micro-processors, NoCs, and DRAM

   Author : Alirad Malek; Chalmers tekniska högskola; []
   Keywords : NATURVETENSKAP; NATURAL SCIENCES; TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY; TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY; Network-on-Chip; Quality-of-Service; Main memory; Micro-processors; Error-Correcting Codes; Reliability analysis; Adaptive fault tolerance;

   Abstract : The adverse effects of technology scaling on reliability of digital circuits have made the use of fault tolerance techniques more necessary in modern computing systems. Digital designers continuously search for efficient techniques to improve reliability, while keeping the imposed overheads low. READ MORE