Search for dissertations about: "Network-on-Chip NoC"

Showing result 1 - 5 of 28 swedish dissertations containing the words Network-on-Chip NoC.

  2. 1. Network on Chip : Performance Bound and Tightness

    Author : Xueqian Zhao; Zhonghai Lu; José Flich Cardo; KTH; []
    Keywords : TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY; Network-on-Chip; Performance analysis; Network Calculus; Informations- och kommunikationsteknik; Information and Communication Technology;

    Abstract : Featured with good scalability, modularity and large bandwidth, Network-on-Chip (NoC) has been widely applied in manycore Chip Multiprocessor (CMP) and Multiprocessor System-on-Chip (MPSoC) architectures. The provision of guaranteed service emerges as an important NoC design problem due to the application requirements in Quality-of-Service (QoS). READ MORE

  4. 2. DDRNoC: Dual Data-Rate Network-on-Chip

    Author : Ahsen Ejaz; Chalmers tekniska högskola; []
    Keywords : NATURVETENSKAP; NATURAL SCIENCES; TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY; TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY; Network-on-Chip; On-Chip Interconnect; Dual Data-Rate; Multiprocessor System-on-Chip; Chip Multiprocessors; System-on-Chip;

    Abstract : Networks-on-Chip (NoCs) are becoming increasing important for the performance of modern multi-core system-on-chip. For various on-chip networks with virtual channel (VC) ow control, the slow control logic (VC and switch allocation logic) of the NoC routers limits the NoC clock period while their datapath (switch and link) possesses signifcant slack. READ MORE

  5. 3. Dual Data Rate Network-on-Chip Architectures

    Author : Ahsen Ejaz; Chalmers tekniska högskola; []
    Keywords : NATURVETENSKAP; NATURAL SCIENCES; TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY; TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY; Dual Data-Rate; Network-on-Chip; System-on-Chip; On-Chip Interconnect; Chip Multiprocessors; Multiprocessor System-on-Chip;

    Abstract : Networks-on-Chip (NoCs) are becoming increasing important for the performance of modern multi-core systems-on-chip. The performance of current NoCs is limited, among others, by two factors: their limited clock frequency and long router pipeline. The clock frequency of a network defines the limits of its saturation throughput. READ MORE

  6. 4. Performance and Energy Efficient Network-on-Chip Architectures

    Author : Sriram Vangal; Atila Alvandpour; Wim Dehaene; Linköpings universitet; []
    Keywords : TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY; Chips; MOS transistors; Network-on-Chip NoC ; process technology; FPMAC; Electrical engineering; Elektroteknik;

    Abstract : The scaling of MOS transistors into the nanometer regime opens the possibility for creating large Network-on-Chip (NoC) architectures containing hundreds of integrated processing elements with on-chip communication. NoC architectures, with structured on-chip networks are emerging as a scalable and modular solution to global communications within large systems-on-chip. READ MORE

  7. 5. Exploring trade-offs between Latency and Throughput in the Nostrum Network on Chip

    Author : Erland Nilsson; Johnny Öberg; Daniel Wiklund; KTH; []
    Keywords : TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY; Micro electronics; Nostrum; Network on Chip; NoC; on-chip networks; micro networks; Nätverk på kisel; Nätverk på chip; Other electrical engineering; electronics and photonics; Övrig elektroteknik; elektronik och fotonik;

    Abstract : During the past years has the Nostrum Network on Chip (NoC) been developed to become a competitive platform for network based on-chip communication. The Nostrum NoC provides a versatile communication platform to connect a large number of intellectual properties (IP) on a single chip. READ MORE