Search for dissertations about: "On-Chip Interconnects"

Showing result 1 - 5 of 16 swedish dissertations containing the words On-Chip Interconnects.

  2. 1. Efficient high-speed on-chip global interconnects

    Author : Peter Caputa; Christer Svensson; Hartmut Grabinski; Linköpings universitet; []
    Keywords : TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY; Microelectronics; Global Interconnects; On-Chip Interconnects; Velocity-of-Light Delay; On-Chip Communication; Low-Latency; Transmission Lines; Electronics; Elektronik;

    Abstract : The continuous miniaturization of integrated circuits has opened the path towards System-on-Chip realizations. Process shrinking into the nanometer regime improves transistor performancewhile the delay of global interconnects, connecting circuit blocks separated by a long distance, significantly increases. READ MORE

  4. 2. Modelling and Analysis of Interconnects for Deep Submicron Systems-on-Chip

    Author : Dinesh Pamunuwa; KTH; []
    Keywords : delay and noise modelling in VLSI circuits; cross-talk; interconnect modelling; timing analysis; transfer function; on-chip bus; bandwidth maximization; throughput maximization; repeater insertion; wire optimization;

    Abstract : The last few decades have been a very exciting period in thedevelopment of micro-electronics and brought us to the brink ofimplementing entire systems on a single chip, on a hithertounimagined scale. However an unforeseen challenge has croppedup in the form of managing wires, which have become the mainbottleneck in performance, masking the blinding speed of activedevices. READ MORE

  5. 3. Slack-Time Aware Dynamic Routing Schemes for on-chip networks

    Author : Daniel Andreasson; Jönköping University; []
    Keywords : TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY; NATURVETENSKAP; NATURAL SCIENCES; Network on Chip; Dynamic Routing; Router design; Routing algorithms; Slack-time; Electronics; Elektronik; Computer science;

    Abstract : Network-on-Chip (NoC) is a new on-chip communication paradigm for future IP-core based System-on-Chip (SoC), designed to remove a number of limitations of today’s on-chip interconnect solutions. A NoC interconnects cores by means of a packet switched micro-network, which improves scalability and reusability, resulting in a shorter time to market. READ MORE

  6. 4. Design of efficient high-speed on-chip global interconnects

    Author : Peter Caputa; Li-Rong Zheng; Linköpings universitet; []
    Keywords : TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY;

    Abstract : The development of integrated circuits is continuously moving towards a System-on­ Chip realization where global interconnects, connecting circuit blocks separated by a long distance, have been considered a showstopper for process scaling due to their RC-delays. Our knowledge today is that high-speed interconnects must be described by models which include not only R and C, but also inductance and skin effect. READ MORE

  7. 5. Design, analysis and integration of mixed-signal systems for signal and power integrity

    Author : Li-Rong Zheng; KTH; []
    Keywords : signal integrity; power distribution; interconnects; deep submicron circuits; system-on-chip; system-in-package; mixed signalsystem; single level integration;

    Abstract : .... READ MORE