Search for dissertations about: "SOC"

Showing result 11 - 15 of 217 swedish dissertations containing the word SOC.

2. 11. Silicon nanowire based devices for More than Moore Applications

   Author : Ganesh Jayakumar; Per-Erik Hellström; Mikael Östling; Luca Selmi; KTH; []
   Keywords : silicon nanowire; biosensor; CMOS; sequential integration; lab-on-chip; LOC; high-K; high-K integration on SiNW biosensor; ALD; fluid gate; back gate; SiNW; SiNW pixel matrix; FEOL; pattern transfer lithography; sidewall transfer lithography; STL; multi-target bio detection; BEOL; nanonets; silicon nanonets; SiNN-FET; SiNW-FET; CMOS integration of nanowires; CMOS integration of nanonets; monolithic 3D integration of nanowires; above-IC integration of nanowires; DNA detection using SiNW; SiNW biosensor; dry environment DNA detection; DNA hybridization detection using SiNW; SiNW functionalization; SiNW silanization; SiNW grafting; FEOL integration of SiNW; BEOL integration of SiNW; sequential multiplexed biodetection; biodetection efficiency of SiNW; front end of line integration of SiNW; back end of line integration of SiNW; SiNW dry environment functionalization; APTES cross-linker; accessing SiNW test site; fluorescence microscopy of SiNW; geometry of SiNW; SiNW biosensor variability; top-down fabrication of SiNW; bottom-up fabrication of SiNW; VLS method; ams foundry CMOS process; adding functionality in BEOL process; sensor integration in BEOL process; hafnium oxide; HfO2; aluminium oxide; Al2O3; TiN backgate; Nickel source drain; ISFET; ion sensitive field effect transistor; Overcoming Nernst limit of detection using SiNW; SiNW sub-threshold region operation; ASIC; SOC; SiGe selective epitaxy; epitaxial growth of SiNW; epitaxial growth of nanowires; epitaxial growth of nanonets; nickel silicide contacts; salicide process; high yield SiNW fabrication; high volume SiNW fabrication; silicon ribbon; SiRi pixel; SiRi biosensor; SiRi DNA detection; monolithic 3D integration of nanonets; above-IC integration of nanonets; impact of back gate voltage on silicon nanowire; impact of back gate voltage on SiNW; FDSOI; fully depleted silicon on insulator technology; metal backgate; wafer scale integration of SiNW; wafer scale integration of nanonets; impact of backgate voltage on CMOS inverter circuit; frequency divider; D flip-flop; Informations- och kommunikationsteknik; Information and Communication Technology;

   Abstract : Silicon nanowires (SiNW) are in the spotlight for a few years in the research community as a good candidate for biosensing applications. This is attributed to their small dimensions in nanometer scale that offers high sensitivity, label-free detection and at the same time utilizing small amount of sample. READ MORE

4. 12. Manufacturability in the Nanometer Era: Regularity considerations in VLSI Circuits

   Author : Kasyab Parmesh Subramaniyan; Chalmers tekniska högskola; []
   Keywords : TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY; Regular Fabrics; Shifters; Barrel Shifter; ASIC; TDM; Bricks; Wired; Transistor; VLSI.; Multipliers; CMOS; HPM; Regularity; SoC; Arithmetic; Circuits;

   Abstract : Each reduction of the technology node has, along with improvements in IC fabricationtechnology, been the main driver in delivering the demand for function rich, integratedmobile electronics that are so prevalent. As devices keep growing smaller and geometriesapproach the order of a few atomic layers, it is increasingly difficult to achievecost-effective mass production for reasons related to performance and fabrication capability. READ MORE

5. 13. On DFM Considerations and Assessment for Nanometer SoCs

   Author : KASYAB PARMESH SUBRAMANIYAN; Chalmers tekniska högskola; []
   Keywords : TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY; TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY; TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY; Multipliers; CMOS; Shifters; DFM; ASIC; SoC; Regularity; Processor;

   Abstract : The incredible density of silicon integrated circuits has brought with it unprecedented technological advances. This is made possible through innovations at each incremental technology node. READ MORE

6. 14. Networks and Nodes : The Practices of Local Learning Centres

   Author : Ulrik Lögdlund; Madeleine Abrandt Dahlgren; Staffan Larsson; Linköpings universitet; []
   Keywords : Learning Centres; adult education; videoconference; actor-networks; actors; networks; Lärcentra; vuxenutbildning; videokonferens aktörsnätverk; aktörer; nätverk; SOCIAL SCIENCES; SAMHÄLLSVETENSKAP;

   Abstract : This thesis focuses on the practice of local learning centres in Sweden. The aim is to describe and to establish an understanding of relations and the actor-networks that surround the practice. The thesis is based on four different studies. READ MORE

7. 15. Distributed Clocking and Clock Generation in Digital CMOS SoC ASICs

   Author : Thomas Olsson; Institutionen för elektro- och informationsteknik; []
   Keywords : TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY; Electrical engineering; Elektroteknik; dual supply voltage; clock generator; digital; VHDL; CMOS; low-power; Distributed clocking; PLL;

   Abstract : With shrinking technologies and higher clock rates comes the possibility to transform multi chip implementations to a single System on Chip (SoC). Implementing clock distribution and limiting the power consumption becomes increasingly troublesome with increased clock rate and chip area. READ MORE