Search for dissertations about: "Transient Faults"

Showing result 1 - 5 of 36 swedish dissertations containing the words Transient Faults.

  1. 1. On Concurrent Error Detection and Error Propagation

    Author : Joakim Ohlsson; Chalmers University of Technology; []
    Keywords : error models; control flow monitoring; simulation experiments; concurrent error detection; permanent faults; watchdog processors; fault injection; transient faults;

    Abstract : This thesis addresses three important steps in the selection of error detection mechanisms for microprocessors: (i) the design and evaluation of error detection mechanisms, (ii) the study of microprocessor error behavior and propagation and (iii) the design and use of error models. The first part of the thesis evaluates four error detection methods with respect to para- meters such as error detection coverage and performance loss, while the second and third parts focus on determining the error patterns most likely to occur in a computer system when different types of faults are present and how to incorporate those error patterns into error models. READ MORE

  2. 2. Fault Injection for Studying Error Behavior and Validation of Error Detecting Mechanisms

    Author : Marcus Rimén; Chalmers University of Technology; []
    Keywords : concurrent error detection; functional error model; control flow error; error detection coverage; permanent faults; data error; error detection latency; simulation-based fault injection; transient faults; physical fault injection; dependability evaluation;

    Abstract : This thesis deals with the design and validation of low-cost error detecting mechanisms that can be used to implement self-checking computers. The research objectives of the thesis are three-fold: (i) to investigate and develop a simulation-based fault injection technique that can be used on a wide range of VHDL simulation models, (ii) to investigate error propagation mechanisms in microprocessors in order to understand how to design low-cost error detecting mechanisms and (iii) to design and validate error detecting mechanisms. READ MORE

  3. 3. Scheduling and Optimization of Fault-Tolerant Embedded Systems

    Author : Viacheslav Izosimov; Zebo Peng; Petru Eles; Anton Cervin; Linköpings universitet; []
    Keywords : NATURAL SCIENCES; NATURVETENSKAP; NATURVETENSKAP; NATURAL SCIENCES; Embedded systems; Real-Time systems; Design optimization; Fault tolerance; Transient faults; Soft errors; Computer and systems science; Data- och systemvetenskap;

    Abstract : Safety-critical applications have to function correctly even in presence of faults. This thesis deals with techniques for tolerating effects of transient and intermittent faults. Reexecution, software replication, and rollback recovery with checkpointing are used to provide the required level of fault tolerance. READ MORE

  4. 4. On Fault Injection-Based Assessment of Safety-Critical Systems

    Author : Daniel Skarin; Chalmers University of Technology; []
    Keywords : NATURVETENSKAP; NATURAL SCIENCES; Transient Faults; Fault Injection; Error Detection and Recovery; Fault Tolerance; Embedded Control Systems;

    Abstract : This thesis deals with techniques for designing and evaluating error detection and recovery mechanisms for computer systems. For the assessment of such systems, we describe a comprehensive fault injection tool that is capable of emulating the effects of hardware errors in microprocessors. READ MORE

  5. 5. Multiple-Bit Errors in Computer Systems

    Author : Rolf Johansson; Chalmers University of Technology; []
    Keywords : fault sim ulation; fault tolerance; single event upsets; error-correcting codes; multiple-bit errors; transient faults; fault modelling; physical fault injection;

    Abstract : This thesis discusses the types of transient faults caused by heavy-ion or a-particle radiation that manifest as multiple-bit errors and how information redundancy techniques can achieve fault tolerance with respect to some classes of multiple-bit errors. The first part of the thesis considers the fault modelling problem, beginning with the problem of how single event upsets (SEUs) originating from faults in register cells in microprocessors manifest as primary errors. READ MORE