Search for dissertations about: "VLIW"
Showing result 1 - 5 of 7 swedish dissertations containing the word VLIW.
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1. Dynamically Reconfigurable Architectures for Real-time Baseband Processing
Abstract : Motivated by challenges from today's fast-evolving wireless communication standards and soaring silicon design cost, it is important to design a flexible hardware platform that can be dynamically reconfigured to adapt to current operating scenarios, provide seamless handover between different communication networks, and extend the longevity of advanced systems. Moreover, increasingly sophisticated baseband processing algorithms pose stringent requirements of real-time processing for hardware implementations, especially for power-budget limited mobile terminals. READ MORE
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2. Integrated Optimal Code Generation for Digital Signal Processors
Abstract : In this thesis we address the problem of optimal code generation for irregular architectures such as Digital Signal Processors (DSPs).Code generation consists mainly of three interrelated optimization tasks: instruction selection (with resource allocation), instruction scheduling and register allocation. READ MORE
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3. Integrated Register Allocation and Instruction Scheduling with Constraint Programming
Abstract : This dissertation proposes a combinatorial model, program representations, and constraint solving techniques for integrated register allocation and instruction scheduling in compiler back-ends. In contrast to traditional compilers based on heuristics, the proposed approach generates potentially optimal code by considering all trade-offs between interdependent decisions as a single optimization problem. READ MORE
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4. Design of programmable multi-standard baseband processors
Abstract : Efficient programmable baseband processors are important to enable true multi-standard radio platforms as convergence of mobile communication devices and systems requires multi-standard processing devices. The processors do not only need the capability to handle differences in a single standard, often there is a great need to cover several completely different modulation methods such as OFDM and CDMA with the same processing device. READ MORE
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5. Code Generation and Global Optimization Techniques for a Reconfigurable PRAM-NUMA Multicore Architecture
Abstract : In this thesis we describe techniques for code generation and global optimization for a PRAM-NUMA multicore architecture. We specifically focus on the REPLICA architecture which is a family massively multithreaded very long instruction word (VLIW) chip multiprocessors with chained functional units that has a reconfigurable emulated shared on-chip memory. READ MORE