Search for dissertations about: "VLSI"

Showing result 1 - 5 of 61 swedish dissertations containing the word VLSI.

  1. 1. Synchoros VLSI Design Style

    Author : Dimitrios Stathis; Ahmed Hemani; Anders Lansner; Christian Weis; Dimitrios Soudris; KTH; []
    Keywords : ENGINEERING AND TECHNOLOGY; TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY; TEKNIK OCH TEKNOLOGIER; TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY; VLSI; ASIC; CGRA; hardware architectures; synchoros VLSI; SiLago; eBrain; BCPNN; Electrical Engineering; Elektro- och systemteknik;

    Abstract : Computers have become essential to everyday life as much as electricity, communications and transport. That is evident from the amount of electricity we spend to power our computing systems. According to some reports it is estimated to be ≈ 7% of the total consumption worldwide. READ MORE

  2. 2. VLSI aspects on inversion in finite fields

    Author : Mikael Olofsson; Christof Paar; Linköpings universitet; []
    Keywords : VLSI; Inversion; Finite Fields; Area; Delay; Power dissipation; Irreducible polynomials; Polynomial basis; Triangular basis; Normal basis; Dual basis; Tower fields.; TECHNOLOGY; TEKNIKVETENSKAP;

    Abstract : Different algorithms and architectures for inversion in finite extension fields are studied. The investigation is restricted to fields of characteristic two. Based on a simple transistor model, various architectures are compared with respect to delay, area requirement, and energy consumption. READ MORE

  3. 3. Trellis Decoding: From Algorithm to Flexible Architectures

    Author : Matthias Kamuf; Institutionen för elektro- och informationsteknik; []
    Keywords : TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY; Electronics; Signalbehandling; Signal processing; VLSI; Viterbi algorithm; trellis decoding; TCM; survivor path; flexibility; convolutional codes; ACS; ASIC; Elektronik; Telecommunication engineering; Telekommunikationsteknik;

    Abstract : Trellis decoding is a popular method to recover encoded information corrupted during transmission over a noisy channel. Prominent members of this class of decoding algorithms are the Viterbi algorithm, which provides maximum likelihood estimates, and the BCJR algorithm, which is a maximum a posteriori estimator commonly used in iterative decoding. READ MORE

  4. 4. REMAP-γ: A Scalable SIMD VLSI Architecture with Hierarchical Control

    Author : Lars Bengtsson; Chalmers University of Technology; []
    Keywords : array signal processing; hierarchical control; SIMD; VLSI architectures; distributed synchronous clocking; embedded supercomputing;

    Abstract : While the clock speed of general purpose (uni-)processors has risen dramatically during recent years, this is not true for SIMD (Single Instruction stream Multiple Data streams) parallel processors. The reason is to be found in the structure of this type of architecture: long-range broadcasting of data, clock and control signals. READ MORE

  5. 5. Dynamically Reconfigurable Resource Array

    Author : Muhammad Ali Shami; Ahmed Hemani; S.K Nandy; KTH; []
    Keywords : ENGINEERING AND TECHNOLOGY; TEKNIK OCH TEKNOLOGIER; TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY; DRRA; CGRA; FPGA; VLSI; ASIC; Embedded systems; Coarse grain reconfigurable architecture; reconfigurable computing;

    Abstract : The goals set by the International Technology Roadmap for Semiconductors (ITRS) for the consumer portable category, to be realized by 2020, are 1000X improvement in performance with only 40\% increase in power budget and no increase in design team size. To meet these goals, the challenges facing the VLSI community are gaps in architecture efficacy, design productivity and battery capacity. READ MORE