Search for dissertations about: "cache coherent multiprocessors"

Found 3 swedish dissertations containing the words cache coherent multiprocessors.

  2. 1. Compiler-Based Approaches to Reduce Memory. Access Penalties in Cache Coherent Multiprocessors

    Author : Jonas Skeppstedt; Chalmers tekniska högskola; []
    Keywords : NATURVETENSKAP; NATURAL SCIENCES; compiler analysis; hardware support; performance evaluation; memory access penalty; cache coherent multiprocessors;

    Abstract : To reduce the average time needed to perform a read or a write access in a multiprocessor, a cache is associated with each processor. A hardware mechanism is used to ensure that the replicated cache copies are consistent. This mechanism employs a protocol which controls when a node may read and/or write a shared data item. READ MORE

  4. 2. Software Techniques for Distributed Shared Memory

    Author : Zoran Radovic; Erik Hagersten; Sandhya Dwarkadas; Uppsala universitet; []
    Keywords : NATURVETENSKAP; NATURAL SCIENCES; synchronization; distributed shared memory; write permission cache; nonuniform communication architecture; node affinity; locality; hardware-software trade-off; profiling; flexibility; trap-based memory architecture; Computer engineering; Datorteknik; Data- och systemvetenskap; Computer Systems Sciences;

    Abstract : In large multiprocessors, the access to shared memory is often nonuniform, and may vary as much as ten times for some distributed shared-memory architectures (DSMs). This dissertation identifies another important nonuniform property of DSM systems: nonuniform communication architecture, NUCA. READ MORE

  5. 3. Efficient synchronization and coherence for nonuniform communication architectures

    Author : Zoran Radović; Erik Hagersten; Uppsala universitet; []
    Keywords : NATURVETENSKAP; NATURAL SCIENCES; Datavetenskap; Computer Science;

    Abstract : Nonuniformity is a common characteristic of contemporary computer systems, mainly because of physical distances in computer designs. In large multiprocessors, the access to shared memory is often nonuniform, and may vary as much as ten times for some nonuniform memory access (NUMA) architectures, depending on if the memory is close to the requesting processor or not. READ MORE