Search for dissertations about: "graph reduction"

Showing result 6 - 10 of 24 swedish dissertations containing the words graph reduction.

  2. 6. Graph Algorithms for Large-Scale and Dynamic Natural Language Processing

    Author : Kambiz Ghoorchian; Magnus Boman; Magnus Sahlgren; Sumithra Velupillai; KTH; []
    Keywords : TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY; Natural Language Processing; Lexical Disambiguation; Topic Modeling; Representation Learning; Graph Partitioning; Distributed Algorithms; Dimensionality Reduction; Random Indexing; ;

    Abstract : In Natural Language Processing, researchers design and develop algorithms to enable machines to understand and analyze human language. These algorithms benefit multiple downstream applications including sentiment analysis, automatic translation, automatic question answering, and text summarization. READ MORE

  4. 7. Low-density parity-check codes : unequal error protection and reduction of clipping effects

    Author : Sara Sandberg; David Declercq; Luleå tekniska universitet; []
    Keywords : TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY; Signalbehandling; Signal Processing;

    Abstract : The invention of low-density parity-check (LDPC) codes made reliable communication possible at transmission rates very close to the theoretical limit predicted by Shannon. However, communication close to the Shannon limit requires very long codes and results in long delay and high encoder and decoder complexity. READ MORE

  5. 8. Baseband Processing for 5G and Beyond: Algorithms, VLSI Architectures, and Co-design

    Author : Mojtaba Mahdavi; Institutionen för elektro- och informationsteknik; []
    Keywords : TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY; TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY; TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY; TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY; VLSI Implementation; Hardware architectures; ASIC implementation; FPGA implementation; CMOS Technology; Baseband Processing; Massive MIMO; 5G New Radio; Beyond 5G; Co-Design; FFT processor; OFDM modulation; wireless communications; Massive MIMO Detection; Angular domain processing; Zero forcing; Systolic array; Non-linear detector; Channel Sparsity; Channel compression; Linear detector; Channel coding; Spatial coupling; Turbo-like codes; Spatially coupled serially concatenated codes; Threshold analysis; Decoder architecture; BCJR algorithm; MAP algorithm; Coupling memory; Window decoding; Complexity analysis; Performance Evaluation; Throughput; Decoding Latency; Silicon area; Design tradeoffs; Interleaver architecture; Memory requirements; Matrix multiplication; Channel state information CSI ; Cholesky decomposition; Tanner graph; Trellis codes; Convolutional encoder; Code design; Puncturing; Reordering circuit; wireless communication system; digital electronic;

    Abstract : In recent years the number of connected devices and the demand for high data-rates have been significantly increased. This enormous growth is more pronounced by the introduction of the Internet of things (IoT) in which several devices are interconnected to exchange data for various applications like smart homes and smart cities. READ MORE

  6. 9. Biodiesel Spray Combustion Modeling Based on a Detailed Chemistry Approach

    Author : Junfeng Yang; Chalmers tekniska högskola; []
    Keywords : TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY; Reduction and Validation; Spray Characteristics; Detailed Chemistry; Biodiesel;

    Abstract : Replacing conventional diesel fuels with biodiesel has the potential to drastically reduce engine-out emissions of soot, carbon monoxide, and total unburnt hydrocarbons, at the cost of slightly increased nitrogen oxide emissions. However, to realize the full benefits of using biofuels in this way, there is a need for theoretical models describing their combustion in internal combustion engines. READ MORE

  7. 10. Improvements in High-Coverage and Low-Power LBIST

    Author : Nan Li; Elena Dubrova; Krishnendu Chakrabarty; KTH; []
    Keywords : NATURVETENSKAP; NATURAL SCIENCES;

    Abstract : Testing cost is one of the major contributors to the manufacturing cost of integrated circuits. Logic Built-In Self Test (LBIST) offers test cost reduction in terms of using smaller and cheaper ATE, test data volume reduction due to on-chip test pattern generation, test time reduction due to at-speed test pattern application. READ MORE