Search for dissertations about: "high performance computing fpga"

Showing result 1 - 5 of 9 swedish dissertations containing the words high performance computing fpga.

2. 1. Field Programmable Gate Arrays and Reconfigurable Computing in Automatic Control

   Author : Carl Wilhelmsson; Förbränningsmotorer; []
   Keywords : TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY; systems analysis; FPGA; Field Programmable Gate Array; programming; Compendex: Field programmable gate arrays FPGA ; programming environments; computer science; programmable controllers; observers; adaptive control; modelling; closed loop systems; logic CAD; control systems; reconfigurable architectures; field programmable gate arrays; Computer Programming; telecommunication control; Control system applications; Real time control; Computer control systems; Control systems; Engine Control; Heat release analysis; Cylinder pressure; power-train control; Vehicle control; High speed; Rapid Prototyping; Combustion control; Automotive control; Control application; High frequency; Computer control; Feedback Control; Closed loop systems; Control; Reconfigurable computing; Reconfigurable hardware; VLSI; Closed loop control; programmable logic arrays; Automatic Control; System on Chip SoC ;

   Abstract : New combustion engine principles increase the demands on feedback combustion control, at the same time economical considerations currently enforce the usage of low-end control hardware limiting implementation possibilities. Significant development is simultaneously and continuously carried out within the field of Field Programmable Gate Arrays (FPGAs). READ MORE

4. 2. A High-end Reconfigurable Computation Platform for Particle Physics Experiments

   Author : Ming Liu; Axel Jantsch; Zhonghai Lu; Wolfgang Kuehn; Lennart Lindh; KTH; []
   Keywords : reconfigurable computing; FPGA implementation; HW SW co-design; pattern recognition; particle physics;

   Abstract : Modern nuclear and particle physics experiments run at a very high reaction rate and are able to deliver a data rate of up to hundred GBytes/s.  This data rate is far beyond the storage and on-line analysis capability. Fortunately physicists have only interest in a very small proportion among the huge amounts of data. READ MORE

5. 3. Dynamically Reconfigurable Resource Array

   Author : Muhammad Ali Shami; Ahmed Hemani; S.K Nandy; KTH; []
   Keywords : TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY; TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY; DRRA; CGRA; FPGA; VLSI; ASIC; Embedded systems; Coarse grain reconfigurable architecture; reconfigurable computing;

   Abstract : The goals set by the International Technology Roadmap for Semiconductors (ITRS) for the consumer portable category, to be realized by 2020, are 1000X improvement in performance with only 40\% increase in power budget and no increase in design team size. To meet these goals, the challenges facing the VLSI community are gaps in architecture efficacy, design productivity and battery capacity. READ MORE

6. 4. Reconfigurable-Hardware Accelerated Stream Aggregation

   Author : Prajith Ramakrishnan Geethakumari; Chalmers tekniska högskola; []
   Keywords : TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY; Stream; Reconfigurable Computing; Aggregation; Dataflow; FPGA; Memory Hierarchy; Compression;

   Abstract : High throughput and low latency stream aggregation is essential for many applications that analyze massive volumes of data in real-time. Incoming data need to be stored in a single sliding-window before processing, in cases where incremental aggregations are wasteful or not possible at all. READ MORE

7. 5. Design of Energy-Efficient High-Performance ASIP-DSP Platforms

   Author : Andréas Karlsson; Dake Liu; Andreas Ehliar; Jarmo Takala; Linköpings universitet; []
   Keywords : NATURVETENSKAP; NATURAL SCIENCES; TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY; NATURVETENSKAP; NATURAL SCIENCES; TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY;

   Abstract : In the last ten years, limited clock frequency scaling and increasing power density has shifted IC design focus towards parallelism, heterogeneity and energy efficiency. Improving energy efficiency is by no means simple and it calls for a reevaluation of old design choices in processor architecture, and perhaps more importantly, development of new programming methodologies that exploit the features of modern architectures. READ MORE