Search for dissertations about: "repeater insertion"

Found 3 swedish dissertations containing the words repeater insertion.

  2. 1. Modelling and Analysis of Interconnects for Deep Submicron Systems-on-Chip

    Author : Dinesh Pamunuwa; KTH; []
    Keywords : delay and noise modelling in VLSI circuits; cross-talk; interconnect modelling; timing analysis; transfer function; on-chip bus; bandwidth maximization; throughput maximization; repeater insertion; wire optimization;

    Abstract : The last few decades have been a very exciting period in thedevelopment of micro-electronics and brought us to the brink ofimplementing entire systems on a single chip, on a hithertounimagined scale. However an unforeseen challenge has croppedup in the form of managing wires, which have become the mainbottleneck in performance, masking the blinding speed of activedevices. READ MORE

  4. 2. The Impact of the Skin Effect on Deep Submicron Integrated Circuits

    Author : Daniel Andersson; Chalmers tekniska högskola; []
    Keywords : TEKNIK OCH TEKNOLOGIER; ENGINEERING AND TECHNOLOGY;

    Abstract : Since the first chip was manufactured in a CMOS technology there has been a drive to shrink dimensions of both wires and transistors. The reason is that down-scaling enables designs with more functionality and higher performance. However, with the 0.25um process, interconnects became as important as the gate delay. READ MORE

  5. 3. System Interconnection Design Trade-offs in Three-Dimensional (3-D) Integrated Circuits

    Author : Roshan Weerasekera; Hannu Tenhunen; Li-Rong Zheng; Atila Alvandpour; KTH; []
    Keywords : NATURVETENSKAP; NATURAL SCIENCES; Interconnects; Parasitic Extraction; Repeaters; Signal Integrity; System-on-Chip SoP ; System-in-Package SiP ; System-on-Package SoP ; Three-dimensional 3-D Integration; Through-Silicon-Via TSV ; Vertical Integration; Information technology; Informationsteknik;

    Abstract : Continued technology scaling together with the integration of disparate technologies in a single chip means that device performance continues to outstrip interconnect and packaging capabilities, and hence there exist many difficult engineering challenges, most notably in power management, noise isolation, and intra and inter-chip communication. Significant research effort spanning many decades has been expended on traditional VLSI integration technologies, encompassing process, circuit and architectural issues to tackle these problems. READ MORE