Microwave CMOS LNAs and VCOs - Using Passives On-Chip, Above Chip, and Off-Chip

Abstract: The performance of LNAs and VCOs is of large importance to the complete wireless communications system. To achieve sufficient performance in microwave applications, LNAs and VCOs have therefore up to now mostly been manufactured in advanced and expensive semiconductor technologies. In this thesis it is shown, however, that by using a standard CMOS technology, combined with different packaging and post processing techniques, it is now possible to achieve both excellent microwave performance and low cost. The rapid technology advancements have lately made CMOS an attractive alternative for RF/microwave applications. The high fT and fmax, the low minimum noise figure, and the excellent integration capabilities are all in favor of modern CMOS technology. The improved high frequency performance of MOS transistors is primarily a result of gate length scaling, but also strongly depends on process and layout optimization. To design state-of-the-art RF/microwave circuits, a thorough understanding of device physics and transistor models is thus necessary. These issues are therefore investigated, particularly focusing on small-dimension effects and high frequency modeling. While device speed and minimum noise factor improve with scaling, the 1/f noise and linearity trends are less obvious. The expected impact of technology scaling on the performance of LNAs and VCOs is therefore also discussed. If noise performance is the main focus of the design, the quality-factor (Q) of the passive components can be as important as the performance of the transistors. If inductors are realized using the standard interconnect layers of the CMOS process, the strong coupling to the conductive substrate results in a reduced Q-factor. The Q-factor can therefore be improved by placing the inductors higher above the conducting substrate, using post-processing with thick BCB and top metal, or by moving them off-chip and integrating them on a carrier. Both principles are evaluated in this thesis. For VCOs oscillating at frequencies well above 10 GHz, the semiconductor varactor, rather than the inductor, limits the phase noise performance. Varactors based on ferroelectric films have very high Q-factors at these frequencies, but unfortunately the technology is not yet compatible with the IC fabrication process. In this thesis, designs based on CMOS dies flip-chip mounted on carriers with ferroelectric varactors have therefore been evaluated. The seven papers included in this work show the potential of CMOS for LNA and VCO design at microwave frequencies. They also investigate the potential of alternative packaging methods, as the passive components are placed either on-chip, above chip, or off-chip. Papers III, IV, V, and VII demonstrate LNAs operating from 5 GHz to 20 GHz, and in Papers I, II, and VI, VCOs operating up to 30 GHz are presented. Several of the designs show state-of-the-art performance.