Novel Processing and Electrical Characterization of Nanowires

Abstract: This thesis investigates novel electrical nanowire characterization tools and devices. Conventional characterization methods, long available to bulk semiconductor samples, have been adapted and transferred to the nanowire geometry. The first part of the thesis describes the development of Hall effect measurements, an entirely new characterization tool for nanowires. It is shown that Hall effect measurements can be performed on InP core-shell nanowires using a self-aligned lifting layer. By combining experimental data with results from simulations of band diagrams and current distribution under the influence of a magnetic field, the carrier density in the n-type nanowire shell can be determined. We found that the nanowire shell exhibits a doping gradient along the length of the nanowire. This doping inhomogeneity is important to account for and engineer when making devices using InP nanowires. The second part of the thesis demonstrates how capacitance-voltage measurements can be performed on arrays of InAs nanowires. Using a novel device structure, the capacitance signal from the nanowires can be distinguished from parasitic capacitances. A model was developed to simulate the capacitance-voltage behavior of the nanowires and was fitted to the experimental data to extract the doping concentration. Furthermore, the hysteresis observed in the capacitance-voltage sweeps was used to calculate the trap density close to the InAs-HfO2 dielectric interface. Finally, studies of gate effects in nanowires are presented. We demonstrate how the gating efficiency is improved by means of wrapped or semiwrapped gates on nanowires. Field-effect transistors made from InP nanowires are described that exhibit both ambipolar behavior and gating efficiency only 13% lower than the theoretical limit. These properties were used to fabricate a field-effect diode, a device in which a p-n junction is formed without any doping incorporation in the active region. We also demonstrate how nanowires positioned laterally on a substrate can be equipped with a fully wrapped gate electrode. This device was developed as part of a platform to perform basic research in which a uniform gating effect is desired.