Hardware/Software partitioning of embedded computer systems

Abstract: The codesign of embedded computer systems involving hardware and software components has received lot of attention in the recent years. There are several different approaches to solve the codesign problem. The approach adopted in this thesis is to implement non time critical parts in software that is executed on some standard processor and implement the performance critical parts in hardware. This keeps the amount of self designed hardware small and thus the implementation effort low. The flexibility is kept high since a large part of the system is implemented in software. This thesis presents a hardware/software partitioning algorithm and three case studies (two from the telecommunication field and one X-windows Mandelbrot plotter) on hardware/software codesign. The partitioning algorithm is based on a knapsack stuffing algorithm which selects a partition of hardware and software which gives the highest system speed-up with the lowest gate cost. The proposed method, partition a C/C++ executable description based on several analysis results; execution profiling, hardware estimations and estimated parameter transfer times. The three case studies show results and experience from the analysis tools, partitioning tools, verification methods and prototyping environment. The case studies are: - D-AMPS Channel Decoder, channel decoder functionality in a D-AMPS cellular phone base station. - F4 model, operation and maintenance functionality of the ATM protocol. - Mandelbrot plotter, X-windows Mandelbrot set plotter.