Crack-junctions : Bridging the gap between nano electronics and giga manufacturing

Abstract: Obtaining both nanometer precision of patterning and parallel fabrication on wafer-scale is currently not possible in conventional fabrication schemes. Just as we are looking beyond semiconductor technologies for next-generation electronics and photonics, our efforts turn to new ways of producing electronic and photonic interfaces with the nanoscale. Nanogap electrodes, with their accessible free-space and connection to electronic circuits, have attracted a lot of attention recently as scaffolds to study, sense, or harness the smallest stable structures found in nature: molecules. The main achievement of this thesis is the development of a novel type of nanogap electrodes, the so called crack-junction (CJ). Crack-junctions are unparalleled at realizing nanogap widths smaller than 10 nm and can be fabricated based exclusively on conventional wafer-scale microfabrication equipment and processes. These characteristics of crack-junctions stem from the sequence of two entirely self-induced steps participating in the formation of the nanogaps: 1./ a splitting step, during which a pre-strained electrode-bridge structure fractures to generate two new electrode surfaces facing one another, followed by 2./ a dividing step during which mechanical relaxation of the elastic strain induces displacement of these surfaces away from one another in a precisely controlled way. The positions of the resulting nanogaps are precisely controlled by designing the electrode-bridges with notched constrictions that localize crack formation. Based on the crack-junction methodology, two continuation concepts are developed and demonstrated. In the first concept, the crack-junction methodology is extended to electrode materials that are ductile, rather than brittle. This led to the development of a new type of break junction, the so called crack-defined break junction (CDBJ). In the second concept, the crack-defined nanogap structures realized by the crack-junction methodology are utilized as a shadow mask for the fabrication of single nanowire devices. The optical-lithography-compatible processes developed here to produce high-density arrays of individually-adjusted crack-junctions, crack-defined break junctions, and single-nanowire devices, provide viable solutions to bridge 10−9 nanoelectronics and 109 giga manufacturing.